2024-01-06 14:27:09 -05:00
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//
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// Created by william on 12/30/23.
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//
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#include <stdbool.h>
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#include <stddef.h>
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#include "types.h"
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#ifndef NESEMULATOR_PPU_H
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#define NESEMULATOR_PPU_H
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#define PPU_REGISTER_SIZE 0x8
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#define PPU_VRAM_SIZE 0x4000
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#define PPU_OAM_SIZE 0xff
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2024-05-13 17:37:36 -04:00
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#define PPU_RAM_BASE_ADDR 0x2000
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#define PPU_RAM_MAX_ADDR 0x4000
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#define PPU_RAM_BANK_SIZE 0x8
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#define PPU_RAM_BANK_COUNT ((PPU_RAM_MAX_ADDR - PPU_RAM_BASE_ADDR) / PPU_RAM_BANK_SIZE)
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2024-01-06 14:27:09 -05:00
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#define PPU_REGISTER_CTRL 0x00
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#define PPU_REGISTER_MASK 0x01
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#define PPU_REGISTER_STATUS 0x02
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#define PPU_REGISTER_OAM_ADDR 0x03
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#define PPU_REGISTER_OAM_DATA 0x04
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#define PPU_REGISTER_SCROLL 0x05
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#define PPU_REGISTER_ADDR 0x06
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#define PPU_REGISTER_DATA 0x07
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#define PPU_CTRL_SCROLL_X 0x1
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#define PPU_CTRL_SCROLL_Y 0x2
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#define PPU_CTRL_BASE_NAMETABLE_ADDR 0x3
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#define PPU_CTRL_VRAM_ADDR_INCREMENT 0x4
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#define PPU_CTRL_SP_PATTERN_TABLE_ADDR 0x8
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#define PPU_CTRL_BG_PATTERN_TABLE_ADDR 0x10
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#define PPU_CTRL_SP_SIZE 0x20
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#define PPU_CTRL_MODE_SELECT 0x40
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#define PPU_CTRL_GEN_VBLANK_NMI 0x80
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#define PPU_MASK_GREYSCALE 0x1
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#define PPU_MASK_SHOW_BG_LEFT 0x2
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#define PPU_MASK_SHOW_SP_LEFT 0x4
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#define PPU_MASK_SHOW_BG 0x8
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#define PPU_MASK_SHOW_SP 0x10
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#define PPU_MASK_EMP_RED 0x20
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#define PPU_MASK_EMP_GREEN 0x40
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#define PPU_MASK_EMP_BLUE 0x80
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#define PPU_STATUS_OPEN_BUS 0x1f
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#define PPU_STATUS_SP_OVERFLOW 0x20
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#define PPU_STATUS_SP_0_HIT 0x40
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#define PPU_STATUS_VBLANK 0x80
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#define PPU_MASK_NONE 0xff
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2024-07-21 16:41:38 -04:00
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#define PATTERN_TABLE_BYTES_SIZE 0x1000
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#define NAMETABLE_BYTES_SIZE 0x0400
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#define PALETTE_TABLE_BYTES_SIZE 0x0020
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typedef struct ppu_memory {
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byte nametable_0[NAMETABLE_BYTES_SIZE];
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byte nametable_1[NAMETABLE_BYTES_SIZE];
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byte palette[PALETTE_TABLE_BYTES_SIZE];
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} PPUMemory;
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typedef struct ppu_tile_fetch {
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byte tile_id;
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byte attribute_table;
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byte pattern_table_tile_low;
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byte pattern_table_tile_high;
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} PPUTileFetch;
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2024-08-17 17:38:15 -04:00
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#if DEBUG
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typedef union {
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struct {
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byte tile_debugger: 1;
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byte tile_debugger_pattern_half: 2;
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} flags;
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byte flags_byte;
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} PPUDebugFlags;
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#endif
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typedef struct ppu {
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PPUMemory memory;
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pixel pixels[256 * 240];
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byte registers[8];
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byte oam_dma_register;
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byte oam[PPU_OAM_SIZE];
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bool odd_frame;
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byte x_scroll;
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byte fine_x_scroll;
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byte y_scroll;
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byte x;
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bool w;
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byte ppu_addr_increment;
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address ppu_address;
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address temp_ppu_addr;
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address bg_pattern_table_addr;
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PPUTileFetch fetch;
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unsigned long frame;
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unsigned int scanline;
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unsigned int cycle;
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#if DEBUG
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PPUDebugFlags debug;
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#endif
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} PPU;
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PPU *ppu_get_state();
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2024-01-06 14:27:09 -05:00
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/**
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* Initializes the PPU, according to the power up state.
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* https://www.nesdev.org/wiki/PPU_power_up_state
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*
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* @param ppu
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*/
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void ppu_init();
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/**
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* Cycles the PPU.
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*
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* @param ppu
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* @param ram
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*/
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void ppu_cycle();
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/**
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* Read a flag from the PPU registers.
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*
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* @param reg The register index
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* @param mask The flag mask
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*/
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bool ppu_read_flag(size_t reg, byte mask);
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byte ppu_read_reg(byte reg);
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void ppu_write_reg(byte reg, byte data);
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void ppu_write_oamaddr(byte data);
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2024-05-29 21:38:52 -04:00
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void ppu_write(address addr, byte data);
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2024-01-06 14:27:09 -05:00
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#endif //NESEMULATOR_PPU_H
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