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//#include "log.h"
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2024-01-06 14:27:09 -05:00
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#include <assert.h>
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#include <string.h>
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2023-11-26 12:11:49 -05:00
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#include "../include/cpu.h"
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#include "cpu.h"
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#include "memory.h"
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2023-12-23 16:35:23 -05:00
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#include "op.h"
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#include "decoding.h"
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#include "log.h"
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2023-09-21 23:53:14 -04:00
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/*
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* =====================================================================================
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*
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2024-05-06 20:23:44 -04:00
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* Filename: cpu_state.c
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*
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* Description: 6502 CPU emulator
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*
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* Version: 1.0
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* Created: 2023-09-21 10:10:26 PM
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* Revision: none
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* Compiler: gcc
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*
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* Author: William Nolin,
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* Organization:
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*
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* =====================================================================================
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*/
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2024-05-06 20:23:44 -04:00
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CPU cpu_state;
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void cpu_init() {
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cpu_state.program_counter = 0x8000;
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cpu_state.stack_pointer = 0xfd;
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cpu_state.accumulator = 0x00;
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cpu_state.x = 0x00;
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cpu_state.y = 0x00;
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cpu_state.status = 0x04;
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cpu_state.oam_dma_triggered = false;
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cpu_state.nmi_requested = false;
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cpu_state.busy_cycle_count = 0;
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}
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void print_registers(byte op, unsigned long cycle_count) {
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log_debug("%#02x %#02x %s \t A:%#02x X:%#02x Y:%#02x F:%#02x SP:%#02x \t [%d]",
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cpu_state.program_counter,
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op,
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get_op_code_name(op),
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cpu_state.accumulator,
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cpu_state.x,
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cpu_state.y,
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cpu_state.status,
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cpu_state.stack_pointer,
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cycle_count);
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}
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void cpu_process_nmi() {
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cpu_stack_push_context();
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address handler_addr = mem_get_word(0xfffa);
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log_debug("NMI %#04x", handler_addr);
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cpu_state.nmi_requested = false;
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cpu_state.program_counter = handler_addr;
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}
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void oam_dma_upload() {
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byte page_high_addr = *ppu_get_state()->oam_dma_register; // TODO
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address page_addr = ((address) page_high_addr) << 8;
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byte n = 0xff;
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byte *ram_source = mem_get_ptr(page_addr);
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byte *oam_destination = ppu_get_state()->oam;
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memcpy(oam_destination, ram_source, n);
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log_debug("OAM DMA %#04x", page_addr);
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cpu_add_cycles(513); // TODO
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}
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void cpu_cycle() {
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if (cpu_state.busy_cycle_count > 0) {
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// The last operation is not done yet
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cpu_state.busy_cycle_count--;
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return;
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}
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if (cpu_state.nmi_requested) {
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cpu_process_nmi();
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}
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if (cpu_state.oam_dma_triggered) {
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oam_dma_upload();
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cpu_state.oam_dma_triggered = false;
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return;
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}
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byte op = cpu_get_next_byte();
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print_registers(op, system_get_cycles());
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process_op_code(op);
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}
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void cpu_add_cycles(unsigned int cycle_count) {
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cpu_state.busy_cycle_count += cycle_count;
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}
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// === Registers ===
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bool cpu_get_flag(byte mask) {
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return cpu_state.status & mask;
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}
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void cpu_set_flag(byte mask, bool set) {
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if (set) {
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cpu_state.status |= mask;
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} else {
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cpu_state.status &= ~mask;
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}
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}
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byte cpu_get_next_byte() {
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byte next_byte = mem_get_byte(cpu_state.program_counter);
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cpu_state.program_counter++;
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return next_byte;
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}
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word cpu_get_next_word() {
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word next_word = mem_get_word(cpu_state.program_counter);
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cpu_state.program_counter += 2;
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return next_word;
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}
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void cpu_stack_push(byte value) {
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assert(cpu_state.stack_pointer > 0);
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address mem_addr = CPU_STACK_ADDR | cpu_state.stack_pointer;
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mem_set_byte(mem_addr, value);
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cpu_state.stack_pointer--;
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}
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byte cpu_stack_pop() {
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assert(cpu_state.stack_pointer < 0xff);
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cpu_state.stack_pointer++;
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address mem_addr = CPU_STACK_ADDR | cpu_state.stack_pointer;
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byte value = mem_get_byte(mem_addr);
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return value;
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}
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void cpu_stack_push_context() {
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cpu_stack_push(cpu_state.program_counter >> 8);
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cpu_stack_push(cpu_state.program_counter & 0xff);
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cpu_stack_push(cpu_state.status);
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}
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void cpu_stack_pop_context() {
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byte value = cpu_stack_pop();
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value &= 0xef; // The B mask cannot be set as it is a CPU signal
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value |= 0x20; // This value is always set
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cpu_state.status = value;
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byte lo = cpu_stack_pop();
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address pc = cpu_stack_pop() << 8;
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pc += lo;
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cpu_state.program_counter = pc;
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}
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void cpu_trigger_oam_dma() {
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cpu_state.oam_dma_triggered = true;
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}
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void cpu_trigger_nmi() {
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cpu_state.nmi_requested = true;
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}
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CPU *cpu_get_state() {
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return &cpu_state;
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}
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