498 lines
17 KiB
C
498 lines
17 KiB
C
//
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// Created by william on 12/30/23.
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// https://www.reddit.com/r/EmuDev/comments/evu3u2/comment/fgr03ms/?utm_source=share&utm_medium=web3x&utm_name=web3xcss&utm_term=1&utm_content=share_button
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//
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// 1. Make sure you have NMI implemented on CPU (pretty straightforward)
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// 2. Implement PPUSTATUS vblank flag (simple) and PPUCTRL NMI flag + background address flag (simple)
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// 3. Implement PPUADDR/PPUDATA so that the nametables are filled out
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// 4. Now you have some data your PPU can actually read for rendering background. Render it scanline by scanline - just follow the wiki on this. Maybe the timing will be bad, it doesn't matter for this game. Start off with rendering tiles based on the pattern table ID, don't try and fetch patterns.
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// 5. Fix the inevitable bugs with your PPUDATA implementation until you see a blocky version of the Donkey Kong screen.
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// 6. Now fetch pattern table data using the nametable data. If it looks "wrong" make sure you are consuming the background address flag. Start off with black and white, then pick two colors to mix for the two bits. Now you should have something like https://i.imgur.com/7OIpHgd.png
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// 7. (Optional) implement palette reads (I'm skipping this for now).
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// 8. Implement OAMDMA (and OAMDATA I guess, I implemented one on top of the other)
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// 9. Now you should have sprite data to render. Implement the logic for copying from primary OAM to scanline OAM. I'm doing it all as one step (not smearing it over up to 256 cycles like the actual hardware). Skip the confusing sprite overflow junk.
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// 10. This is where I'm stuck. I think I need to read the "sprites" section of https://wiki.nesdev.com/w/index.php/PPU_rendering very carefully.
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#include <assert.h>
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#include <string.h>
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#include "ppu.h"
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#include "../include/ppu.h"
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#include "../cpu/cpu.h"
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#include "../include/rom.h"
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#include "colors.h"
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#include "tile_debugger.h"
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#define PPU_VISIBLE_FRAME_END 240
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#define PPU_POST_RENDER_LINE_START PPU_VISIBLE_FRAME_END
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#define PPU_POST_RENDER_LINE_END 242
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#define PPU_PRE_RENDER_LINE 261
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#define PPU_LINE_END PPU_PRE_RENDER_LINE
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#define PPU_LINE_WIDTH 340
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#define NAMETABLE_TILE_SIZE 8
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PPU ppu_state;
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pixel color_list[0x40] = COLOR_LIST;
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void ppu_init() {
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memset(&ppu_state, 0, sizeof(PPU));
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}
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PPU *ppu_get_state() {
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return &ppu_state;
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}
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void ppu_status_set(byte mask, bool enabled) {
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if (enabled) {
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ppu_state.registers[PPU_REGISTER_STATUS] |= mask;
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} else {
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ppu_state.registers[PPU_REGISTER_STATUS] &= ~mask;
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}
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}
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void ppu_trigger_vbl_nmi() {
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if (!ppu_read_flag(PPU_REGISTER_CTRL, PPU_CTRL_GEN_VBLANK_NMI)) {
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// VBlank NMI generation is disabled
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return;
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}
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cpu_trigger_nmi();
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}
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/*
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d888888b d888888b db d88888b
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`~~88~~' `88' 88 88'
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88 88 88 88ooooo
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88 88 88 88~~~~~
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88 .88. 88booo. 88.
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YP Y888888P Y88888P Y88888P
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d8888b. d88888b d8b db d8888b. d88888b d8888b. d888888b d8b db d888b
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88 `8D 88' 888o 88 88 `8D 88' 88 `8D `88' 888o 88 88' Y8b
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88oobY' 88ooooo 88V8o 88 88 88 88ooooo 88oobY' 88 88V8o 88 88
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88`8b 88~~~~~ 88 V8o88 88 88 88~~~~~ 88`8b 88 88 V8o88 88 ooo
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88 `88. 88. 88 V888 88 .8D 88. 88 `88. .88. 88 V888 88. ~8~
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88 YD Y88888P VP V8P Y8888D' Y88888P 88 YD Y888888P VP V8P Y888P
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*/
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static inline byte ppu_pixel_get_palette(byte attribute) {
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unsigned int tile_x = ppu_state.cycle / NAMETABLE_TILE_SIZE;
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unsigned int tile_y = ppu_state.scanline / NAMETABLE_TILE_SIZE;
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// Attribute Data:
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// 7654 3210
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// |||| ||++- Color bits 3-2 for top left quadrant of this byte
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// |||| ++--- Color bits 3-2 for top right quadrant of this byte
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// ||++------ Color bits 3-2 for bottom left quadrant of this byte
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// ++-------- Color bits 3-2 for bottom right quadrant of this byte
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byte palette = attribute;
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if (tile_y % 4 >= 2) {
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palette >>= 4;
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}
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if (tile_x % 4 >= 2) {
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palette >>= 2;
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}
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return palette & 0b11;
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}
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static inline void ppu_pixel_set_color(pixel *pixel, byte pt_low, byte pt_high, byte attribute) {
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for (int i = 0; i < 8; i++) {
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byte pixel_offset = 8 - i - 1;
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byte color_low = (pt_low >> pixel_offset) & 1;
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byte color_high = (pt_high >> pixel_offset) & 1;
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byte color_offset = (color_high << 1) | color_low;
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address color_addr = 0x3f00 + color_offset;
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if (color_offset != 0) { // The first color of a palette (0) is always the universal color
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color_addr += ppu_pixel_get_palette(attribute) * 4;
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}
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byte color = ppu_read(color_addr);
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*(pixel + i) = color_list[color];
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}
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}
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void ppu_draw_tile() {
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PPUTileFetch fetch = ppu_state.fetch;
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unsigned int y = ppu_state.scanline;
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unsigned int x = ppu_state.cycle;
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// if (x > PPU_LINE_WIDTH) {
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// x -= PPU_LINE_WIDTH;
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// y++;
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// }
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//
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// if (y > PPU_PRE_RENDER_LINE) {
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// y -= PPU_PRE_RENDER_LINE;
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// }
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unsigned int pixel_index = y * PPU_VISIBLE_FRAME_END + x;
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pixel *pixel = &ppu_state.pixels[pixel_index];
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ppu_pixel_set_color(pixel, fetch.pattern_table_tile_low, fetch.pattern_table_tile_high, fetch.attribute_table);
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}
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byte ppu_get_pattern(byte tile_index, byte high) {
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#if DEBUG
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if (ppu_state.debug.flags.tile_debugger) {
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return tile_debugger_encode_number_as_pattern(tile_index, ppu_state.scanline % 8);
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}
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#endif
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byte tile_row_index = (ppu_state.scanline + ppu_state.y_scroll) % 8;
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address pattern_addr = ppu_state.bg_pattern_table_addr | tile_index << 4 | high << 3 | tile_row_index;
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return ppu_read(pattern_addr);
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}
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void ppu_fetch_tile(bool render) {
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byte fetch_cycle = (ppu_state.cycle - 1) % 8;
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if (fetch_cycle == 1) {
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address nametable_addr = (ppu_state.ppu_address & 0xfff) | 0x2000;
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ppu_state.fetch.nametable = ppu_read(nametable_addr);
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} else if (fetch_cycle == 3) {
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// PPU address:
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// yyy NN YYYYY XXXXX
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// ||| || ||||| +++++-- coarse X scroll
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// ||| || +++++-------- coarse Y scroll
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// ||| ++-------------- nametable select
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// +++----------------- fine Y scroll
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//
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// The attribute table is at the end of the nametable and contains 64 bytes
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// It controls the palette assignation of a 4x4 tiles area
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byte tile_col = ppu_state.ppu_address & 0x1f;
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byte tile_attr_col = (tile_col >> 2) & 0x7;
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byte tile_row = (ppu_state.ppu_address & 0x3e0) >> 5;
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byte tile_attr_row = (tile_row >> 2) & 0x7;
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// 0x23c0 is the base address of the first attribute table
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address attr_addr = 0x23c0 | (ppu_state.ppu_address & 0x0c00) | (tile_attr_row << 3) | tile_attr_col;
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ppu_state.fetch.attribute_table = ppu_read(attr_addr);
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} else if (fetch_cycle == 5) {
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ppu_state.fetch.pattern_table_tile_low = ppu_get_pattern(ppu_state.fetch.nametable, 0);
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} else if (fetch_cycle == 7) {
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ppu_state.fetch.pattern_table_tile_high = ppu_get_pattern(ppu_state.fetch.nametable, 1);
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if (render) {
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ppu_draw_tile();
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}
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if ((ppu_state.ppu_address & 0x1f) == 0x1f) {
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ppu_state.ppu_address &= ~0x1f;
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ppu_state.ppu_address ^= 0x0400;
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} else {
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ppu_state.ppu_address++;
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}
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}
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}
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void ppu_visible_frame(unsigned int cycle) {
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if (!ppu_read_flag(PPU_REGISTER_MASK, PPU_MASK_SHOW_BG)) {
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// Background rendering is off
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return;
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}
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if (cycle == 0) {
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// Idle...
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} else if (cycle >= 8 && cycle <= 256) {
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ppu_fetch_tile(true);
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if (cycle == 256) {
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if ((ppu_state.ppu_address & 0x7000) != 0x7000) {
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ppu_state.ppu_address += 0x1000;
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} else {
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ppu_state.ppu_address &= ~0x7000;
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if ((ppu_state.ppu_address & 0x3e0) != 0x3a0) {
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ppu_state.ppu_address += 0x20;
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} else {
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ppu_state.ppu_address &= ~0x3e0;
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ppu_state.ppu_address ^= 0x0800;
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}
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}
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}
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} else if (cycle <= 320) {
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// OAMADDR is cleared on sprite loading for pre-render and visible lines
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ppu_write_reg(PPU_REGISTER_OAM_ADDR, 0);
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if (cycle == 257) {
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ppu_state.ppu_address = (ppu_state.ppu_address & 0xfbe0) | (ppu_state.temp_ppu_addr & ~0xfbe0);
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ppu_state.x_scroll = 0;
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}
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} else if (cycle <= 328) {
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ppu_fetch_tile(false);
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}
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}
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void ppu_pre_render(unsigned int x) {
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if (x == 1) {
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// VBlank clear
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ppu_status_set(PPU_STATUS_VBLANK, false);
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}
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if (x >= 257 && x <= 320) {
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// OAMADDR is cleared on sprite loading for pre-render and visible lines
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ppu_write_reg(PPU_REGISTER_OAM_ADDR, 0);
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}
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}
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void ppu_post_render(unsigned int x, unsigned int y) {
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if (x == 1 && y == 241) {
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// VBlank start
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ppu_status_set(PPU_STATUS_VBLANK, true);
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ppu_trigger_vbl_nmi();
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}
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}
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void ppu_cycle() {
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if (ppu_state.scanline < PPU_VISIBLE_FRAME_END) {
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ppu_visible_frame(ppu_state.cycle);
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} else if (ppu_state.scanline >= PPU_POST_RENDER_LINE_START && ppu_state.scanline <= PPU_POST_RENDER_LINE_END) {
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ppu_post_render(ppu_state.cycle, ppu_state.scanline);
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} else if (ppu_state.scanline == PPU_PRE_RENDER_LINE) {
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ppu_pre_render(ppu_state.cycle);
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// ppu_visible_frame(ppu_state.cycle);
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ppu_state.ppu_address = ppu_state.temp_ppu_addr;
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}
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int frame_width = PPU_LINE_WIDTH;
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int frame_height = PPU_LINE_END;
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bool rendering_enabled = ppu_read_flag(PPU_REGISTER_MASK, PPU_MASK_SHOW_BG | PPU_MASK_SHOW_SP);
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if (rendering_enabled && ppu_state.odd_frame) {
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// With rendering enabled, the odd frames are shorter
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// TODO: and doing the last cycle of the last dummy nametable fetch there instead
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// frame_width = PPU_LINE_WIDTH - 2;
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// frame_height = PPU_LINE_END - 1;
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}
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ppu_state.cycle++;
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if (ppu_state.cycle >= frame_width) {
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ppu_state.cycle = 0;
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ppu_state.scanline++;
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}
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if (ppu_state.scanline > frame_height) {
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ppu_state.scanline = 0;
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ppu_state.frame++;
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ppu_state.odd_frame = !ppu_state.odd_frame;
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}
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}
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void ppu_write(address addr, byte data) {
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assert(addr < PPU_VRAM_SIZE);
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address relative_addr;
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if (addr < 0x2000) {
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// TODO Unsupported ?
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} else if (addr < 0x2400) {
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relative_addr = addr - 0x2000;
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ppu_state.memory.nametable_0[relative_addr] = data;
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} else if (addr < 0x2800) {
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relative_addr = addr - 0x2400;
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byte *nametable;
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if (rom_get()->nametable_mirrored) {
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nametable = ppu_state.memory.nametable_1;
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} else {
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nametable = ppu_state.memory.nametable_0;
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}
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nametable[relative_addr] = data;
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} else if (addr < 0x2c00) {
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relative_addr = addr - 0x2800;
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byte *nametable;
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if (rom_get()->nametable_mirrored) {
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nametable = ppu_state.memory.nametable_0;
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} else {
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nametable = ppu_state.memory.nametable_1;
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}
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nametable[relative_addr] = data;
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} else if (addr < 0x3000) {
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relative_addr = addr - 0x2c00;
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ppu_state.memory.nametable_1[relative_addr] = data;
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} else if (addr >= 0x3f00) {
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relative_addr = (addr - 0x3f00) % PALETTE_TABLE_BYTES_SIZE;
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ppu_state.memory.palette[relative_addr] = data;
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}
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}
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byte ppu_read(address addr) {
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assert(addr < PPU_VRAM_SIZE);
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address relative_addr;
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if (addr < 0x2000) {
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return *system_get_mapper()->ppu_read(addr);
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} else if (addr < 0x2400) {
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relative_addr = addr - 0x2000;
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return ppu_state.memory.nametable_0[relative_addr];
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} else if (addr < 0x2800) {
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relative_addr = addr - 0x2400;
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byte *nametable;
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if (rom_get()->nametable_mirrored) {
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nametable = ppu_state.memory.nametable_1;
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} else {
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nametable = ppu_state.memory.nametable_0;
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}
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return nametable[relative_addr];
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} else if (addr < 0x2c00) {
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relative_addr = addr - 0x2800;
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byte *nametable;
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if (rom_get()->nametable_mirrored) {
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nametable = ppu_state.memory.nametable_0;
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} else {
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nametable = ppu_state.memory.nametable_1;
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}
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return nametable[relative_addr];
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} else if (addr < 0x3000) {
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relative_addr = addr - 0x2c00;
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return ppu_state.memory.nametable_1[relative_addr];
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} else if (addr >= 0x3f00) {
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relative_addr = (addr - 0x3f00) % PALETTE_TABLE_BYTES_SIZE;
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return ppu_state.memory.palette[relative_addr];
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}
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// assert(false);
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return 0;
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}
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bool ppu_read_flag(size_t reg, byte mask) {
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return ppu_state.registers[reg] & mask;
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}
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/*
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* d8888b. d88888b d888b d888888b .d8888. d888888b d88888b d8888b. .d8888.
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* 88 `8D 88' 88' Y8b `88' 88' YP `~~88~~' 88' 88 `8D 88' YP
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* 88oobY' 88ooooo 88 88 `8bo. 88 88ooooo 88oobY' `8bo.
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* 88`8b 88~~~~~ 88 ooo 88 `Y8b. 88 88~~~~~ 88`8b `Y8b.
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* 88 `88. 88. 88. ~8~ .88. db 8D 88 88. 88 `88. db 8D
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* 88 YD Y88888P Y888P Y888888P `8888Y' YP Y88888P 88 YD `8888Y'
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*/
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void ppu_write_ctrl(byte data) {
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ppu_state.temp_ppu_addr = (ppu_state.temp_ppu_addr & 0xf3ff) | ((data & PPU_CTRL_BASE_NAMETABLE_ADDR) << 10);
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ppu_state.bg_pattern_table_addr = (data & PPU_CTRL_BG_PATTERN_TABLE_ADDR) << 0x8; // 0x0000 or 0x1000
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ppu_state.ppu_addr_increment = (data & PPU_CTRL_VRAM_ADDR_INCREMENT) ? 0x20 : 1;
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if (ppu_read_flag(PPU_REGISTER_STATUS, PPU_STATUS_VBLANK) &&
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!ppu_read_flag(PPU_REGISTER_CTRL, PPU_CTRL_GEN_VBLANK_NMI) &&
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data & PPU_CTRL_GEN_VBLANK_NMI) {
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// The VBlank flag is still set, and the GEN_VBLANK_NMI was set from 0 to 1
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cpu_trigger_nmi();
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}
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}
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void ppu_write_scroll(byte data) {
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ppu_state.w = !ppu_state.w;
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// TODO: Understand and fix with a game using scrolling
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if (ppu_state.w) {
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ppu_state.temp_ppu_addr = (ppu_state.temp_ppu_addr & 0xffe0) | (data >> 3);
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ppu_state.fine_x_scroll = data & 0x7;
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} else {
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ppu_state.temp_ppu_addr = ppu_state.temp_ppu_addr & 0xc1f;
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ppu_state.temp_ppu_addr |= (data & 0xf8) << 2;
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ppu_state.temp_ppu_addr |= (data & 0x7) << 12;
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ppu_state.y_scroll = data;
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}
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}
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void ppu_write_addr(byte data) {
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ppu_state.w = !ppu_state.w;
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if (ppu_state.w) {
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ppu_state.temp_ppu_addr = (ppu_state.temp_ppu_addr & 0x00ff) | (data & 0x3f) << 8;
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} else {
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ppu_state.temp_ppu_addr = (ppu_state.temp_ppu_addr & 0xff00) | data;
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ppu_state.ppu_address = ppu_state.temp_ppu_addr;
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}
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}
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void ppu_write_data(byte data) {
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address addr = ppu_state.ppu_address;
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ppu_write(addr, data);
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ppu_state.ppu_address = addr + ppu_state.ppu_addr_increment;
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}
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void ppu_write_oamdata(byte data) {
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byte oam_addr = ppu_state.registers[PPU_REGISTER_OAM_ADDR];
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ppu_write_reg(PPU_REGISTER_OAM_ADDR, oam_addr + 1);
|
|
}
|
|
|
|
void ppu_write_oamaddr(byte data) {
|
|
ppu_state.oam_dma_register = data;
|
|
}
|
|
|
|
void ppu_write_reg(byte reg, byte data) {
|
|
assert(reg >= 0);
|
|
assert(reg <= PPU_REGISTER_SIZE);
|
|
|
|
switch (reg) {
|
|
case PPU_REGISTER_CTRL:
|
|
ppu_write_ctrl(data);
|
|
break;
|
|
case PPU_REGISTER_SCROLL:
|
|
ppu_write_scroll(data);
|
|
break;
|
|
case PPU_REGISTER_ADDR:
|
|
ppu_write_addr(data);
|
|
break;
|
|
case PPU_REGISTER_DATA:
|
|
ppu_write_data(data);
|
|
break;
|
|
case PPU_REGISTER_OAM_DATA:
|
|
ppu_write_oamdata(data);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
ppu_state.registers[reg] = data;
|
|
}
|
|
|
|
byte ppu_read_status() {
|
|
ppu_state.w = false;
|
|
byte status = ppu_state.registers[PPU_REGISTER_STATUS];
|
|
ppu_state.registers[PPU_REGISTER_STATUS] &= ~PPU_STATUS_VBLANK;
|
|
return status;
|
|
}
|
|
|
|
byte ppu_read_data() {
|
|
// Access to VRAM memory is slow, so reading it a first time generally return the memory at the previous address.
|
|
// So we get the data first, then update the register.
|
|
byte data = ppu_state.registers[PPU_REGISTER_DATA];
|
|
ppu_state.registers[PPU_REGISTER_DATA] = ppu_read(ppu_state.ppu_address);
|
|
if (ppu_state.ppu_address > 0x3eff) {
|
|
// But the palette data is returned immediately
|
|
data = ppu_state.registers[PPU_REGISTER_DATA];
|
|
}
|
|
|
|
ppu_state.ppu_address = ppu_state.ppu_address + ppu_state.ppu_addr_increment;
|
|
return data;
|
|
}
|
|
|
|
byte ppu_read_reg(byte reg) {
|
|
assert(reg >= 0);
|
|
assert(reg <= PPU_REGISTER_SIZE);
|
|
|
|
switch (reg) {
|
|
case PPU_REGISTER_STATUS:
|
|
return ppu_read_status();
|
|
case PPU_REGISTER_DATA:
|
|
return ppu_read_data();
|
|
default:
|
|
return ppu_state.registers[reg];
|
|
}
|
|
} |