diff --git a/core/src/lib.rs b/core/src/lib.rs
index 4b11368..e421a3a 100644
--- a/core/src/lib.rs
+++ b/core/src/lib.rs
@@ -1,6 +1,7 @@
 mod cpu;
 mod memory;
 pub mod rom;
+mod system;
 
 pub trait Clock {
     /// Run a clock cycle
diff --git a/core/src/memory.rs b/core/src/memory.rs
index 7399eef..4faf703 100644
--- a/core/src/memory.rs
+++ b/core/src/memory.rs
@@ -5,6 +5,11 @@ pub struct MemoryBus {
 }
 
 impl MemoryBus {
+    pub fn new() -> Self {
+        let ram = [0; MEMORY_SIZE];
+        Self { ram }
+    }
+    
     /// Gets a byte from memory.
     ///
     /// # Arguments
diff --git a/core/src/rom/ines.rs b/core/src/rom/ines.rs
index 5cea701..b6515fa 100644
--- a/core/src/rom/ines.rs
+++ b/core/src/rom/ines.rs
@@ -1,7 +1,6 @@
 //! INes 2.0 Format implementation
 
 use crate::rom::{CpuTiming, NametableMirroring, Rom, RomLoader, RomReadError};
-use bitflags::bitflags;
 
 pub struct INesHeader {
     prg_rom_size_lsb: u8,
diff --git a/core/src/system.rs b/core/src/system.rs
new file mode 100644
index 0000000..15535c3
--- /dev/null
+++ b/core/src/system.rs
@@ -0,0 +1,21 @@
+use std::cell::RefCell;
+use std::rc::Rc;
+use crate::cpu::Cpu;
+use crate::memory::MemoryBus;
+
+pub struct System {
+    cpu: Cpu,
+    memory_bus: Rc<RefCell<MemoryBus>>,
+}
+
+impl System {
+    pub fn new() -> Self {
+        let memory_bus = Rc::new(RefCell::new(MemoryBus::new()));
+        let cpu = Cpu::new(memory_bus);
+        
+        Self {
+            cpu,
+            memory_bus
+        }
+    }
+}
\ No newline at end of file